The HDL and Vivado Simulation session successfully enhanced students' understanding of Hardware Description Languages (HDL) and the FPGA design flow using Xilinx Vivado. Participants gained hands-on experience in writing, simulating, and debugging Verilog/VHDL programs while analyzing simulation waveforms for digital circuits. The workshop improved their practical knowledge of digital system design, functional verification, and FPGA development tools. Students developed confidence in implementing combinational and sequential logic circuits using industry-standard software. The session also strengthened their problem-solving and design skills, preparing them for VLSI, embedded systems, and semiconductor industry applications as well as higher studies in digital design.
KPRIET β An AI Integrated Campus
Preparing future-ready engineers with AI-integrated teaching and learning. KPRIET integrates Artificial Intelligence across teaching, learning, research and innovation to create a smarter, future-ready campus experience for students and faculty.