ATAL FDP - RECENT TRENDS IN SEMICONDUCTOR SYSTEM DESIGN AND TESTING TECHNIQUES, KPR Institute Engineering and Technology, Autonomous Engineering Institution, Coimbatore, India

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UG Courses

Hybrid Event
ATAL FDP - RECENT TRENDS IN SEMICONDUCTOR SYSTEM DESIGN AND TESTING TECHNIQUES
FDP Dept. Level
DATE
Feb 05, 2024 to Feb 10, 2024
TIME
09:00 AM to 09:00 AM
DEPARTMENT
EC
TOTAL PARTICIPATES
39
ATAL FDP - RECENT TRENDS IN SEMICONDUCTOR SYSTEM DESIGN AND TESTING TECHNIQUES ATAL FDP - RECENT TRENDS IN SEMICONDUCTOR SYSTEM DESIGN AND TESTING TECHNIQUES
Outcome
Summary

The ATAL FDP on 'RECENT TRENDS IN SEMICONDUCTOR SYSTEM DESIGN AND TESTING TECHNIQUES' is scheduled from 05.02.2024 to 10.02.2024. The FDP was inaugurated by our beloved Principal Dr. D. Saravanan in the presence of Dr. M. Kathirvelu, HoD, ECE along with faculty members and participants. The first session was handled by Dr.A.Senthilkumar, Dean (Academic and Autonomous),Senior Professor, Department of EEE,Dr. Mahalingam College of Engineering & Technology, Pollachi on the topic Reconfigurable Hardware architectures. Then the afternoon session was handled by Dr. Sakthivel R, Associate Professor Grade 2, Department of Micro and Nanoelectronics, School of Electronics Engineering, Vellore Institute of Technology Vellore on the topic VLSI Architecture. The Day 2 was handled by Dr. M. Senthil Sivakumar & Dr. D. Suresh, Assistant Professor, Department of ECE, Indian Institute of Information Technology, Tiruchirappalli on the topic VLSI System Design Testing and Validation & VLSI Phase change Memory Devices respectively. Day 3 was handled by Dr. Suresh Balanethiram Assistant Professor, Department of ECE, National Institute of Technology, Puducherry on the topic Compact modeling and continued by Dr. Mamidi Nagaraju, Technical Manager, (ASIC Design and EDA Support), Entuple Technologies, Bengaluru on the topic UART Design and Prospect. During the Day 4 the topic Low Power VLSI Circuit Design was handled by Dr. Bhaskar M, Professor, Department of ECE, National Institute of Technology, Trichy and ASIC Design Flow by Mr. B. K. Shivaprasad, Sr. Field Application Engineer, Entuple Technologies, Bengaluru. The industrial visit to VVDN technologies, Arutchelvar Advanced Technology Center, 6th Floor, Diamond Jubilee Building Dr. MCET Campus, Udumalai Road, Pollachi, Coimbatore, TamilNadu – 642003 was planned for participants on day 5 as a part of FDP. The afternoon session is on LEON Processor Architecture and Design by Mr. V. Navaneethakrishnan, Sr. Field Application Engineer, Entuple Technologies, Bengaluru. The last day of FDP event started with a session on Stress Management by Mr. S. Satheesh Kumar, Assistant Professor (Sr.G.), Department of ECE, KPR Institute of Engineering and Technology, Coimbatore. Then the FDP event continued with Reflection Journal session, Assessment (MCQ), Feedback collection Interactions with the participants and concluded with a Valedictory function. The article discussion session was carried out on Day 1 to Day 4. The hands-on training session was provided to participants from Day 1 to Day 5.


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